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I'm learning about caching, and currently have some degree of familiarity with main memory and paging.

While reading this this Intel paper, I'm confused about the term "cache pages". I know that the OS deals with main memory in units of pages, and I know that you can change the page size by enabling Huge/Large pages on some operating systems. My question is whether the "cache pages" discussed in this resource are the same as the pages which OS swaps between memory and disk.

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Footnote 3 on page 5:

A cache page is not associated with a memory page in page mode. The word page has several different meaning when referring to a PC architecture.

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I'm far from an expert, but I've never heard the term "cache page" and it looks like non-standard terminology to me. From the discussion on page 6 to 9 about cache associativity it seems that a cache's "page size" is equal to the number of sets/lines times the line size:

Each cache way contains 128 cache lines. The cache page size is 4K, or 128 lines. Figure 3-2 shows a diagram of the 2-way set-associate scheme with the line numbers filled in.

So the capacity of the discussed cache would be two pages. It is completely unrelated to paged virtual memory.

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The cache page size is equal to the size of the cache way.

They mean the participated address ranges which a single way of the cache can handle as cache page i guess.

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