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Questions tagged [non-volatile-memory]

Memory which maintains its value through power cycles.

1 vote
1 answer
89 views

In the datasheets of Intel-Altera configuration flash devices (EPCS and EPCQ series), the interface is described as Active Serial Interface (AS) rather than SPI. The interface pins (nCS, DCLK, DATA, ...
Harun Y.'s user avatar
5 votes
1 answer
139 views

Question about W25Q128JVSIQ flash memory chip. I found the most recent revision of the datasheet, stating that parts with IQ in their name, are Quad-SPI enabled by default from factory. (so pin ...
Bikay's user avatar
  • 313
0 votes
1 answer
262 views

I am kind of finishing up hardware design based on AMD Zynq 7010 SoC which has different peripherals. This is the most complex design that I have done in my past and I wanted to get some sort of ...
James's user avatar
  • 359
2 votes
1 answer
80 views

I am looking to write a page program for this W25Q64FV Flash component. I want to use a full sector of 256-bytes. I have learned ...
K_T's user avatar
  • 641
1 vote
1 answer
366 views

I am using STM32 Nucleo-144 development board with STM32H7S3L8 MCU. I get this comment when trying to run code that cubeIDE generated initially: ...
Nicolas Tsagareli's user avatar
0 votes
2 answers
75 views

ReRAM-based IMC techniques are promising for ML inference. Many research papers propose ReRAM IMC techniques for accelerating NN operations. However, they do not discuss the system integration of the ...
learner1's user avatar
0 votes
0 answers
55 views

recently I tried to flash my STM32F302CCT7 with a ST-link, openOCD, and gdb for arm. I am using the rust toolchain which requires that the ROM and RAM locations to be specified in a memory.x file when ...
matthew choe's user avatar
1 vote
3 answers
780 views

I found this heavily downvoted question about how to implement a non-volatile switch (i.e. a switch that remembers its last state even when power is removed). While the OP asked the question in a ...
Ryan Griggs's user avatar
  • 2,790

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