Questions tagged [memory]
Consider instead more specific tags, e.g., dram, sram, flash
901 questions
-2 votes
1 answer
87 views
Construct a 32 x 8 RAM using 8 x 4 RAM chips [closed]
I have a problem in my book in the practice section that "construct a 32 x 8 RAM using 8 x 4 RAM chips." I know 32 x 8 RAM contains 8 output line and 5 input. So I need 8 RAM chips. But the ...
-3 votes
0 answers
28 views
Parallel Bus interface on SOM module [duplicate]
I have this SOM module. I initially planned to boot the SOM module from a NAND Flash IC that uses a parallel interface (requiring address, clock, enable, and data signals). According to the datasheet, ...
- 1,821
5 votes
2 answers
858 views
Why does ECC add 1/4 more DRAM ICs with DDR5, rather than 1/8?
While shopping for 32 GiByte DDR5 ECC UDIMMs, I found pictures with 20 identical DRAM ICs, where I was expecting 18, because that's been the usual number for large DDR/DDR2/DDR3/DDR4 ECC UDIMMs, and I ...
- 2,085
-2 votes
1 answer
132 views
Can I connect this RAM to a breadboard
I'm looking at this RAM: https://gr.mouser.com/ProductDetail/Ramxeed/MB85R4M2TFN-G-JAE2?qs=sGAEpiMZZMs6Aik9Fp479ij4Y1Ujk4wm%252B7sI6f6xMBM%3D How big diameter are the pins of this RAM? Can I stick it ...
- 297
1 vote
1 answer
174 views
DDR3 in a fly-by routing
I recently completed fly-by routing for 2 x DDR3 and a Zynq 7000 chip by studying their app notes or general notes on how to do fly-by routing. Now that I finished the routing then I started having ...
- 359
2 votes
1 answer
230 views
Issue with QUAD OUTPUT FAST READ (0x6B) on Micron NOR Flash (MT25QL128ABA)
I am using a Micron NOR Flash Chip (MT25QL128ABA) along with a Zynq-7020 FPGA. I have implemented a QSPI driver in Verilog, which successfully communicates with the Flash behavioral Verilog model in ...
0 votes
3 answers
134 views
In a solution to an exercise, each memory address has a length of 64 bits, and I do not understand why
In a solution to an exercise in my notes for a Computer Architecture course, it is stated that each memory address has a length of 64 bits, and I do not understand why. The problem statement is as ...
- 235
0 votes
0 answers
117 views
How are multiple DDR5 DIMMs wired into to the same channel?
This question is about how multiple DDR5 DIMMs in the same memory channel are wired to the processor. This is mostly an electrical engineering question, and the goal to answer this question: Will re-...
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