How to reduce current limiter's voltage drop when not limiting

Question

I have a working current limiter design that actively limits current to 3.6A. However, the voltage drop across Rsense1 is too high for my application. If I used to a smaller current sense resistor (8mohm as an example), what changes would I need to make to the circuit to make that work? I know that I need to use a current sense amplifier, but I don't know how to properly integrate that into the design.

XY problem. You need to limit current with less drop, have decided to solve it by implementing a current sense amplifier, and asking how to use one in the design. Maybe if you focused on specs of current limiting, there might be a different way of solving it, instead of implementing a current sense amplifier into the existing design. Perhaps there is even a ready-made chip you can buy so you don't have to roll your own. What are the specs for current limiting? — Justme
– Justme, Commented Oct 26 at 12:25
I wouldn't say this is an X-Y problem: the question as stated is clear and has straightforward answers. As a separate matter, a 100W (maximum) limiter does make one wonder whether there's a better way to do it. Especially with a SO-8 MOSFET shown. — Tim Williams
– Tim Williams, Commented Oct 26 at 12:46
@flamezdude the "obvious" spec that is missing to me here seems to be what the maximum voltage drop across the sense resistor is – and why it matters to you. In the end, the current limiting here happens through adding series resistance – coming from both the fixed resistance of the sense resistor and the effective r_DS of the MOSFET. If you reduce Rsense, for the same current limiting, you would need to increase r_DS of M1; I don't see how you're winning anything here, unless the load's operational curve requires you to work it extremely close to 28 V. But that seems unlikely. — Marcus Müller
– Marcus Müller, Commented Oct 26 at 13:39
but the same thermal power not dissipated by the resistor is the instead dissipated by M1, as explained in my previous comment. How is that solving anything? — Marcus Müller
– Marcus Müller, Commented Oct 26 at 14:07
@flamezdude uhhh, what kind of load is this? We're starting to get into territory where it sounds like you're looking for a step-down regulator with a built-in current limit rather than a simple current limit then? (come on, don't let us beg for information. You can well describe what this thing does, what the power source and load are, without us asking you half a dozen times.) — Marcus Müller
– Marcus Müller, Commented Oct 26 at 14:53

Andrew Cline · Accepted Answer · 2025-10-29 14:49:00Z

EDIT: I meant to add earlier that this MOSFET has a max V_gs of +-20V. The original circuit, as well as mine, will exceed this voltage. I will update when I get the chance. Also, as Pete W mentioned, the op-amp will become overloaded if the load current changes quickly.

The current is controlled by the voltage drop across R1. The voltage across R1 is dependent on the current through Q4. The current through the base of Q4 is dependent on both R2 (Q2?) and the voltage at the source of the MOSFET (and voltage drop across Rsense1). This voltage will have to be greater than 0.6V, which is the forward bias voltage of Q4. Basically, it's impossible to have less voltage drop on that resistor without some extra components.

If, instead of using a 0.23Ω sense resistor, you used a 0.023Ω resistor, you would get 10x less voltage drop, and you could amplify that voltage using a rail-to-rail op-amp.

I did this by setting the gain of the op-amp to 10 (Gain = 1 + R5/R6). If Rsense1 is 10x less resistance, we need to amplify that voltage by 10. This is the circuit I came up with.

EDIT: Tim Williams mentioned driving the MOSFET with the op-amp directly. If you wanted to do that, you could create a circuit like this:

This circuit works by essentially comparing the voltage on the sense resistor to some value. When the current increases to 3.6A, the voltage on the sense resistor becomes 0.0828V, which puts that node at 27.9172V. This will drive the op-amp output higher, turning off the FET. When there is no current, the op-amp will output 0V, effectively turning it on. However, it's difficult to confirm the stability of this circuit, especially since the input voltage will need to be fairly precise. (Use a voltage divider for the non-inverting input)

And here is the .asc (open the LTSpice file with notepad and paste it in)

Version 4 SHEET 1 880 840 WIRE -64 -48 -288 -48 WIRE 336 -48 -64 -48 WIRE 464 -48 336 -48 WIRE 336 0 336 -48 WIRE 464 112 464 -48 WIRE -288 128 -288 -48 WIRE 224 144 192 144 WIRE 336 144 336 80 WIRE 336 144 304 144 WIRE -64 192 -64 -48 WIRE 336 224 336 144 WIRE 336 224 304 224 WIRE 48 240 0 240 WIRE 192 240 192 144 WIRE 192 240 128 240 WIRE 240 240 192 240 WIRE 464 256 464 192 WIRE 464 256 304 256 WIRE 464 304 464 256 WIRE 416 320 384 320 WIRE -64 368 -64 288 WIRE 384 368 384 320 WIRE 384 368 -64 368 WIRE -64 464 -64 368 WIRE 464 464 464 400 WIRE -288 624 -288 208 WIRE -64 624 -64 544 WIRE -64 624 -288 624 WIRE 464 624 464 544 WIRE 464 624 -64 624 WIRE -64 704 -64 624 FLAG -64 704 0 SYMBOL pmos 416 400 M180 SYMATTR InstName M1 SYMATTR Value FDS4435A SYMBOL res 480 208 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R1 SYMATTR Value 0.023 SYMBOL res 448 448 R0 SYMATTR InstName R3 SYMATTR Value {R} SYMBOL res -48 560 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R4 SYMATTR Value 5k SYMBOL voltage -288 112 R0 SYMATTR InstName V1 SYMATTR Value 28 SYMBOL pnp 0 288 R180 SYMATTR InstName Q1 SYMATTR Value 2N3906 SYMBOL OpAmps/opamp 272 176 M0 SYMATTR InstName U1 SYMBOL res 320 128 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 9k SYMBOL res 352 96 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R6 SYMATTR Value 1k SYMBOL res 144 224 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 5k TEXT -200 792 Left 2 !.step param R 2 50 0.5 TEXT -200 760 Left 2 !.tran 1m TEXT -200 824 Left 2 !.lib opamp.sub

Is the transistor really necessary? Surely the op-amp could drive the MOSFET directly. — Tim Williams
– Tim Williams, Commented Oct 27 at 2:11
Thanks a lot for your help! I think I can work with this design. — flamezdude
– flamezdude, Commented Oct 27 at 13:09
@TimWilliams Yes, you could do that. I just thought OP wanted to "amplify" the voltage drop, so that's what I did. I updated my answer, though. — Andrew Cline
– Andrew Cline, Commented Oct 27 at 16:42
in the 2nd scenario, V2 can be constructed as (V1 - 1.25V) with a common TLV431 reference coming down from the V1=28V; then the OPA can be set, eg., with gain ~= 20 resulting in 62.5 mV across the sense resistor. Also protect V_GS, and maybe double check impact of capacitive loading of OPA by gate — Pete W
– Pete W, Commented Oct 27 at 17:13
@PeteW Yes, I forgot about the max V_gs. I checked the datasheet and it was +- 20V, but it slipped my mind. Would you just place a resistor between the gate and the op-amp so that large load variations don't burn up the op-amp or use a buffer? — Andrew Cline
– Andrew Cline, Commented Oct 29 at 14:09

Pete W · Accepted Answer · 2025-10-27 02:48:24Z

If using transistors, below is a way to reduce the Vdrop across Rsense.

Executive summary:

Shutdown condition is approx 128mV across \$R_{SENSE}\$
Please be aware that this is not a precision circuit.

General idea:

Let's consider the P-mos shut-down condition. It happens when the entire 3mA current is diverted by the PNP on the left.
With the two PNP's having equal base voltage, it means the ratio of their \$I_C\$, which we choose, determines a predictable difference of their \$V_E\$. Something like 28mV near room temp based on this 3:1 current ratio.
The 33 ohm adds an additional offset of 100mV, to desensitize us partially vs temperature (though at the expense of picking up dependence on that nominally 3mA current value).
The shutdown condition is thus 100mV + 28mV = 128mV across \$R_{SENSE}\$. So you would scale this resistor value accordingly, to obtain the current limit into the P-mos.

The zener or TVS diode is just to protect the P-mos gate from being pulled down to \$V_{GS} = -28V\$ which is usually too much.

The transistors should be a matched pair package such as DMMT3906

Next we'll construct the bias currents simply as resistors. Here there is sensitivity to the P-mos gate voltage (when the P-mos is close to off), which I guessed at. That voltage isn't too predictable, and this is one of several things making the circuit a crude solution. An additional transistor pair could be added to stabilize the \$I_C\$ ratio but let's not complicate things.

Finally, a variant with foldback:

This one is slightly different in purpose and behavior.
The scenario this is for might be if something like an inrush, and the purpose of the protection would be to stop the P-mos getting blown out. Thus we would be more interested in power into the P-mos, rather than current. The current limit will thus vary substantially vs load voltage.
The power-vs-voltage curve can be shaped by tweaking resistor values
general idea of the circuit: Compared to the previous circuit, here the reference leg of the PNP comparator (the one with 27k) is connected instead so that its bias current comes (mostly) from the drain of the P-mos. (An additional resistor to ground, 680k here, lets it continue limiting when the load voltage is near the supply.)
It's probably necessary to make sure the current limit never goes all the way to zero (esp at low load voltages, near the start of an inrush), which can happen for some resistor value combinations when tweaking it.
I would be extra cautious about reproducibility of something like this - i.e. leave plenty of margin for error. (click to zoom)

Instead of two separate transistors, it might be better to used a matched pair like the BCM857. — Hearth
– Hearth, Commented Oct 27 at 0:38
The foldback version doesn't flip until more than 0.7V drop, obviating the request. Perhaps another bias resistor could be added to mitigate this? — Tim Williams
– Tim Williams, Commented Oct 27 at 2:09
@TimWilliams - yes, updated showing a version that should limit over the full V range — Pete W
– Pete W, Commented Oct 27 at 2:52

jpa · Accepted Answer · 2025-10-27 07:52:54Z

Limiting to 3.6A at 28V could potentially dissipate 100 watts when the output is short-circuited. You mention that overcurrent events would be rare and that you don't care about dissipation during them. But this level of dissipation is enough to permanently damage the FET in a couple of seconds.

Instead, I'd suggest using a purpose-designed power switch IC. For example TPS1H100 provides an adjustable current limit, but also thermal protection. If the overcurrent event starts to overheat the internal switch FET, it will automatically turn it off for a moment and retry after a cool-off period.

ocelot · Accepted Answer · 2025-10-27 13:42:03Z

You could also consider using a Hall Effect sensor which measures the magnetic field around a wire, and produces a voltage proportional to the magnetic field. And use that voltage to trigger a shut down or current limiter. Maybe expensive but could reduce the voltage drop to effectively just that of the MOSFET.

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