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Questions tagged [bus]

is a subsystem that transfers a plurality of digital bits grouped together to achieve or represent a common function or variable.

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On one page I have: Parent schematic: First block is connecting OK Second does not connect correctly: What am I doing wrong? Sorry if the question is naive - I am doing it infrequently (electronics ...
0___________'s user avatar
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1 vote
2 answers
128 views

1. Control Models Master / Slave The master controls the communication line (decides when to transmit or receive). The slave transmits or receives under the master’s command. Peer‑to‑Peer (symmetric) ...
Pizza's user avatar
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1 answer
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This STM32 MCU has the following block diagram which shows the busses, core, peripherals ect: The datasheet mentions busses called AHB, AHB1 and AHB2. But I can only see AHB2 is marked in the bus ...
user4444's user avatar
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I have a configuration where a medium-voltage switch connects directly to a transformer via a cable. There is no bus at the transformer side in the actual installation, as the cable terminates ...
Julián Oviedo's user avatar
1 vote
2 answers
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When extending a CAN bus network that has the speed of 500 kbit/s with additional 15m length with 120-ohm terminators: Is using a dedicated 120-ohm CAN bus cable essential for minimizing ...
Shamooooot's user avatar
1 vote
1 answer
164 views

In a number of MCU families there are built in CAN bus controllers, which include self testing function of loop back. Loop Back mode can be configured as External Loop Back and Internal Loop Back. ...
Maksim Maksimautsou's user avatar
2 votes
1 answer
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I have an FPGA that send data from a shared bus(the bus called COM(0:15)), which is connected to three buffers. Each buffer is connected to the same bus, and the FPGA controls which buffer will drive ...
Knowledge's user avatar
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2 answers
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I've got a chip with an active high open drain (i.e. high X normally, +Vcc when active) status pin that I'd like to feed to a bus with active low open collector. Both are running at the same voltage (...
Trevor's user avatar
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5 votes
3 answers
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I am designing a PCB with 16 RS485 connectors. My idea is to create a "short" RS485 bus on PCB using PCB traces with 120 Ohm resistors on both ends. And then connect the 16 RS485 sensors to ...
user14665305's user avatar
8 votes
3 answers
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I'm trying to figure out if on-chip busses (for e.g., ARM AMBA) have dedicated metal paths for each direction between the components the bus connects. Or does the bus use the same metal path to make ...
agshe's user avatar
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1 answer
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Antennas can recieve data (bits) because RF signals induce an analog signal into it in a serial format, essentially a voltage that varies over time. My question is can we have an antenna that can ...
19216811's user avatar
1 vote
1 answer
172 views

I'm trying to create a network of hot pluggable collections of iot devices into a bus (Containing Device 'A') that will always be present. There could be up to 50 collections with each collection ...
iBax's user avatar
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2 votes
1 answer
343 views

I have a tristate bus where both input and output are controlled via 74HC573 latches, with only one latch OE (output enabled) active at any time. My concern is that the signal update from the control ...
padawan's user avatar
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2 answers
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I am looking for a can it be done and, if someone is willing, a how to. I am building an OBD2 breakout box for easily scoping automotive computer data lines and want to add LEDs as a quick visual of ...
ToreanPW's user avatar
1 vote
2 answers
430 views

The bus clock rate is how many times per second data is transferred from one component to another. If we consider DRAM DDR4-3200, the clock frequency of the RAM bus today can be 1600 MHz at the same ...
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