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Pull requests: YosysHQ/picorv32
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Fix CATCH_MISALIGN: misaligned store from driving mem_wstrb on AXI-Lite
#282 opened Oct 24, 2025 by canxin121 Loading…
Fix CATCH_MISALIGN: suppress register writeback on misaligned load trap
#281 opened Oct 24, 2025 by canxin121 Loading…
Enhancement: set new_ascii_instr to UNDEFINED by default
#230 opened Feb 20, 2023 by flaviens Loading…
Add missing RVFI signals to picorv32_axi and picorv32_wb
#226 opened Jan 30, 2023 by MathieuSnd Loading…
Insert delay after release power-down SPI flash command
#167 opened Jun 6, 2020 by joshtyler Loading…
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