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Pull requests list

CodeGen: Add missing subtarget to TargetLoweringBase constructor for ARC, CSKY and M68K backend:ARC backend:CSKY backend:m68k
#168811 by tclin914 was merged Nov 20, 2025 Loading…
3
Remove unused <vector> inclusion backend:AMDGPU backend:ARC backend:DirectX backend:Hexagon backend:NVPTX backend:Xtensa debuginfo llvm:adt llvm:binary-utilities llvm:codegen llvm:mc Machine (object) code llvm:support objectyaml platform:windows tools:llvm-exegesis tools:llvm-reduce
#166997 by serge-sans-paille was merged Nov 8, 2025 Loading…
8
[clang] NFC: rename TagType::getOriginalDecl back to getDecl backend:AArch64 backend:ARC backend:ARM backend:Lanai backend:loongarch backend:MIPS backend:RISC-V backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd ClangIR Anything related to the ClangIR project coroutines C++20 coroutines debuginfo HLSL HLSL Language Support lldb
#163271 by mizvekov was merged Oct 15, 2025 Loading…
@mizvekov
7
CodeGen: Remove TRI arguments from stack load/store hooks backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well tablegen
#158240 by arsenm was merged Nov 11, 2025 Loading…
7
CodeGen: Remove TRI argument from reMaterialize backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well tablegen
#158229 by arsenm was merged Nov 11, 2025 Loading…
4
ARM: Remove TRI argument from AddDReg backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well tablegen
#158228 by arsenm was merged Nov 10, 2025 Loading…
7
CodeGen: Remove TRI argument from getRegClass backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well tablegen
#158225 by arsenm was merged Nov 10, 2025 Loading…
6
CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:regalloc llvm:SelectionDAG SelectionDAGISel as well tablegen
#158224 by arsenm was merged Nov 10, 2025 Loading…
21
[llvm] Move data layout string computation to TargetParser backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:ir
#157612 by rnk was merged Sep 11, 2025 Loading…
40
CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen tablegen
#157337 by arsenm was merged Sep 8, 2025 Loading…
15
[TableGen][Decoder] Remove special case of single sub-op dag backend:ARC backend:ARM backend:Lanai backend:PowerPC tablegen
#156175 by s-barannikov was merged Aug 31, 2025 Loading…
3
[clang] NFC: introduce Type::getAsEnumDecl, and cast variants for all TagDecls backend:AArch64 backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd ClangIR Anything related to the ClangIR project debuginfo HLSL HLSL Language Support
#155463 by mizvekov was merged Aug 26, 2025 Loading…
@mizvekov
7
[clang] AST: fix getAs canonicalization of leaf types backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd ClangIR Anything related to the ClangIR project debuginfo HLSL HLSL Language Support
#155028 by mizvekov was merged Aug 27, 2025 Loading…
@mizvekov
29
[NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:Xtensa llvm:mc Machine (object) code tablegen
#154802 by jurahul was merged Aug 21, 2025 Loading…
24
[Target] Remove SoftFail field on targets that don't use it (NFC) backend:AMDGPU backend:ARC backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:Xtensa
#154659 by s-barannikov was merged Aug 21, 2025 Loading…
4
[PATCH 5/7] [clang] NNS improvement: getOriginalDecl changes backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd coroutines C++20 coroutines debuginfo HLSL HLSL Language Support lldb
#149747 by mizvekov was merged Aug 9, 2025 Loading…
@mizvekov
2
[PATCH 4/7] [clang] Improve NestedNameSpecifier: clang-tools-extra changes backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd coroutines C++20 coroutines debuginfo HLSL HLSL Language Support lldb
#148015 by mizvekov was merged Aug 9, 2025 Loading…
@mizvekov
3
[PATCH 3/7] [clang] improve NestedNameSpecifier: test changes backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:dataflow Clang Dataflow Analysis framework - https://clang.llvm.org/docs/DataFlowAnalysisIntro.html clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd coroutines C++20 coroutines debuginfo HLSL HLSL Language Support libc++ libc++ C++ Standard Library. Not GNU libstdc++. Not libc++abi. lldb
#148014 by mizvekov was merged Aug 9, 2025 Loading…
@mizvekov
23
[PATCH 2/7] [clang] improve NestedNameSpecifier: misc small clang changes backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:dataflow Clang Dataflow Analysis framework - https://clang.llvm.org/docs/DataFlowAnalysisIntro.html clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd coroutines C++20 coroutines debuginfo HLSL HLSL Language Support libc++ libc++ C++ Standard Library. Not GNU libstdc++. Not libc++abi. lldb
#148012 by mizvekov was merged Aug 9, 2025 Loading…
@mizvekov
14
[clang] Improve nested name specifier AST representation backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:as-a-library libclang and C++ API clang:bytecode Issues for the clang bytecode constexpr interpreter clang:codegen IR generation bugs: mangling, exceptions, etc. clang:dataflow Clang Dataflow Analysis framework - https://clang.llvm.org/docs/DataFlowAnalysisIntro.html clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category clang-tidy clang-tools-extra clangd coroutines C++20 coroutines debuginfo HLSL HLSL Language Support libc++ libc++ C++ Standard Library. Not GNU libstdc++. Not libc++abi. lldb
#147835 by mizvekov was merged Aug 9, 2025 Loading…
4
@mizvekov
160
[TableGen][DecoderEmitter] Add option to emit type-specialized code backend:AMDGPU backend:ARC backend:CSKY backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:SystemZ backend:Xtensa tablegen
#146593 by jurahul was closed Aug 30, 2025 • Draft
153
[CostModel] Mark all TTIImpls as final. NFC backend:AArch64 backend:ARC backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:NVPTX backend:PowerPC backend:RISC-V backend:SPIR-V backend:SystemZ backend:X86
#143404 by davemgreen was merged Jun 15, 2025 Loading…
5
[Basic] Remove unused includes (NFC) backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:Hexagon backend:loongarch backend:m68k backend:Xtensa clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang Clang issues not falling into any other category
#142295 by kazutakahirata was merged Jun 1, 2025 Loading…
3
[ARC][CSKY][Lanai] TableGen-erate SDNode descriptions backend:ARC backend:CSKY backend:Lanai
#138874 by s-barannikov was merged May 8, 2025 Loading…
1
Ws lend backend:ARC llvm:SelectionDAG SelectionDAGISel as well llvm:support llvm:transforms
#136643 by GYXgo was closed Jun 27, 2025 Loading…
2
ProTip! Updated in the last three days: updated:>2025-11-28.