Create a circuit with max 6 NAND gates

I take it that this is early in a class and that you've not yet been taught enough logic manipulation to be able to rigorously develop a desired result here.

Let me start with something quite simple. A NAND is the exact same thing as an OR, with inverted inputs. You can work this out for yourself once you know De Morgan's two laws:

1. the negation of a disjunction is the conjunction of the negations.
2. the negation of a conjunction is the disjunction of the negations.

So: \$F_0=\overline{X\cdot Y}=\overline{X}+\overline{Y}\$. Handy to know.

From the above, now:

$$\begin{align*} \overline{X\cdot Y}&=\overline{C} + \left(A\cdot B + \overline{A}\cdot D\right)\\\\ &=\overline{\overline{\overline{C} + \left(A\cdot B + \overline{A}\cdot D\right)}}\\\\ &=\overline{C\cdot\overline{A\cdot B + \overline{A}\cdot D}}\\\\ & & \therefore X &= C\\\\ & & Y&=\overline{A\cdot B + \overline{A}\cdot D} \end{align*}$$

So that is one NAND, as follows:

^{simulate this circuit – Schematic created using CircuitLab}

The problem has been reduced. Continue, by focusing on the remaining unresolved portion:

$$\begin{align*} \overline{X\cdot Y}&=\overline{A\cdot B + \overline{A}\cdot D}\\\\ &=\overline{\overline{\overline{A\cdot B + \overline{A}\cdot D}}}\\\\ &=\overline{\overline{\overline{A\cdot B}\:\cdot\:\overline{\overline{A}\cdot D}}}\\\\ & & \therefore X &= \overline{A\cdot B}\\\\ & & Y&=\overline{\overline{A}\cdot D} \end{align*}$$

Clearly, the double-negation we are left with means we need to invert the output of the NAND (to make an AND.) So now:

^{simulate this circuit}

Then quickly:

^{simulate this circuit}

Now, the remainder is also obvious:

$$\begin{align*} \overline{X\cdot Y}&=\overline{\overline{A}\cdot D}\\\\ & & \therefore X &= \overline{A}\\\\ & & Y&=D \end{align*}$$

So:

^{simulate this circuit}

Now, this process works. And it can work for fairly complex expressions, too. But it won't necessarily find optimal solutions. There are methods to help with that process.