Questions tagged [ddr3]
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132 questions
0 votes
1 answer
79 views
DDR3 UDIMM dual rank stick design considerations
I am designing a standard 240 pin DDR3 UDIMM PC ram stick for learning purposes. I did quite a lot of research on the DDR3 architecture and PCB layout, but there are still some questions that I can ...
1 vote
1 answer
90 views
DDR3 potential signal integrity issue
I am currently in progress designing SoC based on AMD Zynq7010 with two DDR3 memory (MT41K256M16TW-107IT:P). I am utilizing fly by routing. Upper memory is 2nd DDR3 memory and lower memory is 1st DDR3 ...
- 359
1 vote
2 answers
84 views
Spartan-6 MIG DDR3 Write Issue: Incorrect DQS to CK Alignment
I'm implementing a DDR3 controller using Xilinx MIG on a Spartan-6 XC6SLX16-2FTG256 FPGA. The DDR3 memory I'm using is MT41J128M16. The issue is that, during write operations, the upper byte (DQ[15:8])...
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0 votes
0 answers
89 views
DDR3 Termination Resistors Messing Up SI?
Do these results make any sense? Or is there perhaps a bug in the Altium Designer Keysight SI plug-in? I'm testing the new Altium SI plug-in by Keysight. In particular, I'm curious about using it to ...
- 207
0 votes
1 answer
365 views
Ferrite bead vs feed through capacitors for LPDDR4
I am designing a TI's AM6442 processor board I am using SK-AM64x their development board as desgin reference. There are two version an older and a newer Old version schemtatic: New version ...
- 529
0 votes
1 answer
183 views
Please Review my PCB stackup
I am developing an AM6442 SOM. This is PCB layer stackup This my layer assignments: L1: Signals - Low Speed (UART, QEP, PWM, DeltaSigma ADC, GPIO, JTAG) L2: Ground Plane L3: Signals - HighSpeed ...
- 529
1 vote
3 answers
197 views
DDR3 Address Line Length Matching Tolerance
I'm looking at a design where the maximum difference between two address signals of a DDR3 memory is 306ps. The frequency is advertised to be 800MHz, so it seems that one address signal would arrive 1/...
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0 votes
1 answer
173 views
Choosing DDR3 for Zynq-7000 (XC7Z010-1CLG400I)
Looking at the AC characteristics of the Zynq-7000 it is said that the maximum data rate of the -1 speed grade is 800Mbit/s (it is also specifically mentioned that the clock frequency for data ...
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